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VHDLAdvanced

Testbench: Memory arbiter (VHDL)

Verify rotating priority, one-hot grants and respect for backpressure.

Exercise objective

The DUT grants access to a request according to its arbitration policy.

Prerequisites

  • Read signals and write assertions in a VHDL testbench.
  • Understand the circuit under test: The DUT grants access to a request according to its arbitration policy.

Skills you will practice

  • Priority
  • Fairness
  • Backpressure

Equipment and tools

  • The VHDL editor and validation are available in the browser. You do not need an FPGA board for this exercise.

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