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VHDLIntermediate

Testbench: 4-bit CRC calculator (VHDL)

Verify CRC results on several words and reset between frames.

Exercise objective

The DUT calculates the CRC of the received data stream.

Prerequisites

  • Read signals and write assertions in a VHDL testbench.
  • Understand the circuit under test: The DUT calculates the CRC of the received data stream.

Skills you will practice

  • CRC
  • Reset

Equipment and tools

  • The VHDL editor and validation are available in the browser. You do not need an FPGA board for this exercise.

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