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Block Design

Custom AXI-Lite Peripheral

Integrate a packaged IP with control registers, PWM, status and interrupt.

Exercise objective

Integrate a packaged IP with control registers, PWM, status and interrupt.

Prerequisites

  • Read digital schematics and recognize clocks, resets and interfaces.
  • Identify the blocks and interfaces needed for “Custom AXI-Lite Peripheral”.

Skills you will practice

  • Integrate a packaged IP with control registers, PWM, status and interrupt.
  • AXI4-Lite
  • Custom IP
  • Zynq
  • IP Integrator

Equipment and tools

  • Browser-based Block Design editor.
  • Zynq UltraScale+ and a user-packaged AXI4-Lite IP.

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