Block Design
PS/PL BRAM Mailbox
Share a BRAM mailbox between the processor and a PL state machine with interrupt.
Exercise objective
Share a BRAM mailbox between the processor and a PL state machine with interrupt.
Prerequisites
- Read digital schematics and recognize clocks, resets and interfaces.
- Identify the blocks and interfaces needed for “PS/PL BRAM Mailbox”.
Skills you will practice
- Share a BRAM mailbox between the processor and a PL state machine with interrupt.
- Mailbox
- BRAM
- PS/PL
- IP Integrator
Equipment and tools
- Browser-based Block Design editor.
- Zynq UltraScale+; 32-bit true dual-port BRAM.