Modular Shift-Add Multiplier

Inputs satisfy 0 <= x,y < m with m<=255. Initialize acc=0, addend=x, and multiplier=y. Each cycle, add addend to acc when the multiplier low bit is 1, then reduce with one subtraction of m. Also double and reduce addend, then shift the multiplier right.

Perform exactly eight steps after accepting i_start. Ignore new starts while o_busy is active. Present the reduced result with a one-cycle o_done pulse. Reset is synchronous active high.

For m=251, the testbench covers 200*200 mod 251=91, 250*250 mod 251=1, zero, and identity.