Synchronous FIFO Controller

Intermediate

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01General Operation

The FIFO controller manages a circular buffer of depth G_FIFO_DEPTH. Writes add data when the FIFO is not full, reads consume when not empty. Status flags indicate FIFO state (empty, full, almost empty, almost full, occupancy count).

Reset is synchronous and active-high.

Writes are ignored when the FIFO is full
Reads are ignored when the FIFO is empty
Thresholds G_FIFO_A_EMPTY and G_FIFO_A_FULL configure alert levels

02Interface

Generics:

G_FIFO_PTR_WIDTH : integer - Pointer width
G_FIFO_DEPTH : integer - FIFO depth

Ports:

Signal	Direction	Width	Description
`i_clk`	Input	1 bit	System clock
`i_rst`	Input	1 bit	Synchronous reset
`i_fifo_we`	Input	1 bit	Write Enable
`o_fifo_full`	Output	1 bit	FIFO full
`o_fifo_ptr_wr`	Output	G_FIFO_PTR_WIDTH	Write pointer
`i_fifo_re`	Input	1 bit	Read Enable
`o_fifo_empty`	Output	1 bit	FIFO empty
`o_fifo_ptr_rd`	Output	G_FIFO_PTR_WIDTH	Read pointer
`o_fifo_level`	Output	G_FIFO_PTR_WIDTH+1	Fill level

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