Chargement…
Chargement…
The module is sequential: each i_valid inserts one new 4-bit value.
Behaviour
i_clear empties the array.o_full=1.o_s0..o_s3 contain ascending sorted values.| Signal | Direction | Width | Description |
|---|---|---|---|
i_clk | Input | 1 bit | System clock |
i_reset | Input | 1 bit | Active-high asynchronous reset |
i_clear | Input | 1 bit | Internal clear |
i_valid | Input | 1 bit | Valid input sample |
i_value | Input | 4 bits | Input value |
o_s0 | Output | 4 bits | Output s0 |
o_s1 | Output | 4 bits | Output s1 |
o_s2 | Output | 4 bits | Output s2 |
o_s3 | Output | 4 bits | Output s3 |
o_full | Output | 1 bit | Output full |