>_FPGA VHDL Pour Tous
DashboardChallengesLeaderboardCertificationPremium
FR

Courses

  • 01. AXI Protocol
  • 02. AXI-Lite Protocol
  • 03. AXI-Stream Protocol
  • 04. SPI Protocol
  • 05. I2C Protocol
  • 06. UART Protocol
  • 07. Wishbone Protocol
  • 08. Avalon Protocol

Exercises

Protocols

8 courses

Follow the courses in the recommended order.

  1. 01
    AXI ProtocolThe AXI (Advanced eXtensible Interface) protocol by ARM: write/read channels, burst transfers and handshake.
    →
  2. 02
    AXI-Lite ProtocolAXI-Lite: the simplified AXI variant for configuration registers and control interfaces.
    →
  3. 03
    AXI-Stream ProtocolAXI-Stream: continuous data streaming without address management.
    →
  4. 04
    SPI ProtocolMaster the SPI (Serial Peripheral Interface) protocol and its VHDL implementation
    →
  5. 05
    I2C ProtocolMaster the I2C (Inter-Integrated Circuit) protocol and its addressing and acknowledgment mechanisms
    →
  6. 06
    UART ProtocolMaster the UART (Universal Asynchronous Receiver/Transmitter) protocol and its VHDL implementation
    →
  7. 07
    Wishbone ProtocolDiscover the open-source Wishbone bus, the standard for open-hardware SoC designs
    →
  8. 08
    Avalon ProtocolDiscover Intel/Altera's Avalon protocol for memory-mapped and streaming interfaces in FPGAs
    →
>_FPGA VHDL Pour Tous

Learn VHDL, from beginner to expert.

Courses

  • VHDL
  • FPGA
  • Digital Electronics
  • Protocols

Practice

  • Specification - Beginner
  • HW → Simulation
  • Leaderboard

Corporate

  • Corporate Training
  • Partnerships
  • Challenges
  • Certification
© 2026 FPGA VHDL Pour Tous
Privacy|Terms