Chargement…
Chargement…
The module is sequential and keeps the two previous samples.
Behaviour
i_valid, compute x0 + 2*x1 + x2.o_valid pulses with the computed output.| Signal | Direction | Width | Description |
|---|---|---|---|
i_clk | Input | 1 bit | System clock |
i_reset | Input | 1 bit | Active-high asynchronous reset |
i_valid | Input | 1 bit | Valid input sample |
i_sample | Input | 8 bits | Input sample |
o_valid | Output | 1 bit | Valid output |
o_sample | Output | 10 bits | Output sample |