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The top level connects two provided components: a BCD counter and a 7-segment decoder. The counter produces a BCD digit that feeds the decoder. Both components are permanently enabled.
| Signal | Direction | Width | Description |
|---|---|---|---|
i_clk | Input | 1 bit | System clock |
i_reset | Input | 1 bit | Active-high async reset |
o_seg | Output | 7 bits | 7-seg segments |