Chargement…
Chargement…
4-bit up counter. Walks 0 → 15 then wraps to 0.
Behaviour:
i_reset='1'): o_cpt ← "0000".i_clk: - if i_en='1' → o_cpt ← o_cpt + 1 (automatic 15 → 0 wrap),
- if i_en='0' → o_cpt is held.
*Asynchronous active-high reset.*
| Signal | Direction | Width | Description |
|---|---|---|---|
i_clk | Input | 1 bit | System clock |
i_reset | Input | 1 bit | Active-high async reset |
i_en | Input | 1 bit | Enable |
o_cpt | Output | 4 bits | Counter value |