Chargement…
Chargement…
The Johnson counter is a shift register where the complement of the LSB feeds back to the MSB. It produces a sequence of 2N states (8 for a 4-bit register): 0000, 1000, 1100, 1110, 1111, 0111, 0011, 0001.
Reset is synchronous and active-high.
| Signal | Direction | Width | Description |
|---|---|---|---|
i_clk | Input | 1 bit | System clock |
i_rst | Input | 1 bit | Active-high synchronous reset |
o_q | Output | 4 bits | Counter output |