Chargement…
Chargement…
Same principle as the 8x4 RAM but with 16 addresses. Synchronous write on rising edge when i_we = '1'. Continuous asynchronous read.
| Signal | Direction | Width | Description |
|---|---|---|---|
i_clk | Input | 1 bit | Clock |
i_we | Input | 1 bit | Write enable |
i_addr | Input | 4 bits | Address (0 to 15) |
i_data | Input | 4 bits | Data to write |
o_data | Output | 4 bits | Data read |