Logic BIST Controller

When start is accepted while idle, apply the 15 nonzero states of the 4-bit LFSR sequence seeded with 0001 and using taps 4 and 1. The circuit under test provides one response bit per pattern; compact it into the signature register using polynomial x^4+x+1.

• busy stays high during the 15 captures; done pulses at completion.
• pass reports whether the resulting signature matches expected_signature.
• Synchronous active-high reset cancels the test and clears the signature.