March Memory Test Controller

After start, perform four passes over addresses 0 through 15: write 00, read/check 00, write FF, read/check FF. The memory interface has asynchronous reads and synchronous writes.

• we and re indicate the current operation; addr traverses 0 through 15 in each pass.
• fail goes high on any read mismatch and stays high until reset or the next test.
• done pulses once after the final read; busy is high during the test.