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Chargement…
A new value must remain stable for several cycles before being accepted.
Behavior
noisy_in into the clk domain.clean_out changes after STABLE_CYCLES consecutive equal samples that differ from its value.| Signal | Direction | Width | Description |
|---|---|---|---|
clk, reset | Input | 1 bit | Clock and synchronous reset |
noisy_in | Input | 1 bit | Noisy asynchronous input |
clean_out | Output | 1 bit | Filtered state |