Chargement…
Chargement…
The two reads are combinational and independent.
Behavior
write_data when write_enable=1.read_data_a and read_data_b follow their addresses without a clock.| Signal | Direction | Width | Description |
|---|---|---|---|
clk, write_enable | Input | 1 bit | Clock and write enable |
write_address, read_address_a, read_address_b | Input | 3 bits | Addresses |
write_data | Input | 8 bits | Write data |
read_data_a, read_data_b | Output | 8 bits | Read data |