Combinational Design
Move from a logic requirement to a truth table, a simplified expression and a VHDL implementation.
What combinational logic does
A combinational circuit produces an output that depends only on its current inputs. It stores no state. When inputs change, signals propagate through gates, then the output stabilizes after a finite delay.
Classic examples:
- multiplexer;
- decoder;
- comparator;
- adder;
- flag computation;
- bus selection logic.
The design method is the same for a small circuit and for a more realistic VHDL block.
Design method
- Define the inputs and outputs precisely.
- Write the truth table or the useful cases.
- Derive a logic expression.
- Simplify if it clarifies the circuit.
- Write the VHDL.
- Simulate the important cases.
On an FPGA, the synthesizer already simplifies many expressions. Manual simplification is mostly useful for understanding, documentation and avoiding ambiguous cases.
Example: majority detector
The output Y must be 1 if at least two inputs among A, B, C are 1.
| A | B | C | Y |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 0 |
| 1 | 0 | 1 |