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Chargement…
Configurable-width adder (g_width bits) with carry-in and carry-out. Implements bit-by-bit carry propagation (ripple carry). Purely combinational circuit.
g_width (default 4)ieee.std_logic_1164, not numeric_std| Signal | Direction | Width | Description |
|---|---|---|---|
i_a | Input | g_width bits | Operand A |
i_b | Input | g_width bits | Operand B |
i_cin | Input | 1 bit | Carry in |
o_sum | Output | g_width bits | Sum result |
o_cout | Output | 1 bit | Carry out |