W1C Register (Write-1-to-Clear)

Intermediate

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01General Operation

Configurable-width Write-1-to-Clear (W1C) register, used for status registers. Writing '1' to a bit clears it, while external events can set bits. Clear has priority over set.

Reset is asynchronous and active-low.

Generic g_DATA_WIDTH (default 8)
Priority: clear > set
Asynchronous active-low reset

02Interface

Signal	Direction	Width	Description
`i_clk`	Input	1 bit	System clock
`i_rst_n`	Input	1 bit	Active-low reset
`i_set_en`	Input	1 bit	Set enable
`i_set_data`	Input	g_DATA_WIDTH bits	Data to OR into register
`i_clr_en`	Input	1 bit	Clear enable
`i_clr_mask`	Input	g_DATA_WIDTH bits	Clear mask (bits at '1' clear)
`o_reg`	Output	g_DATA_WIDTH bits	Current register value

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