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Synchronous counter of configurable width. Increments on rising edge when enable is active. Automatically wraps after maximum value and signals wrap-around.
Reset is asynchronous and active-high.
g_WIDTH (default 8)std_logic_vector| Signal | Direction | Width | Description |
|---|---|---|---|
i_clk | Input | 1 bit | System clock |
i_reset | Input | 1 bit | Active-high async reset |
i_en | Input | 1 bit | Counter enable |
o_cpt | Output | g_WIDTH bits | Current counter value |
o_max | Output | 1 bit | Maximum value indicator |