Chargement…
Chargement…
On rising edge, if i_load = '1', the register loads i_data. Otherwise it holds. Reset clears to "00000000".
| Signal | Direction | Width | Description |
|---|---|---|---|
i_clk | Input | 1 bit | Clock |
i_reset | Input | 1 bit | Active-high async reset |
i_load | Input | 1 bit | Parallel load |
i_data | Input | 8 bits | Data to load |
o_q | Output | 8 bits | Register content |