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Write VHDL and simulate with GHDL directly in the browser.
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mu0 - Top-level assembly
VHDLWire the mu0 processor components to build a functional top level.
UART - Top-level assembly
VHDLWire the top-level of a full UART (TX + RX) from the provided components.
Repeated-Addition Multiplier
VHDLRebuild an FSMD that multiplies two 8-bit operands using repeated additions.
GCD by Subtractions
VHDLRecode a GCD FSMD based on comparisons, swap and subtraction.
Square-Root Approximation
VHDLRebuild an FSMD that approximates the magnitude of two signed 8-bit values.