Chargement…
Chargement…
One bit is shifted into the register on every rising edge.
Behavior
reset=1 synchronously clears parallel_out.serial_in enters bit 0 and old bits shift toward bit 7.| Signal | Direction | Width | Description |
|---|---|---|---|
clk, reset | Input | 1 bit | Clock and synchronous reset |
serial_in | Input | 1 bit | Serial input |
parallel_out | Output | 8 bits | Parallel output |