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The controller starts when i_start='1' and o_ready='1'. It tests bits from most significant to least significant. On each cycle, i_cmp='1' means the input voltage is greater than or equal to the current DAC value: the tested bit is kept. Otherwise, the tested bit is cleared.
Behaviour
o_dac_code exposes the current trial word;o_valid becomes '1' when o_result contains the final result;| Signal | Direction | Width | Description |
|---|---|---|---|
i_clk | Input | 1 bit | Clock |
i_rst | Input | 1 bit | Synchronous active-high reset |
i_start | Input | 1 bit | Start conversion |
i_cmp | Input | 1 bit | Analog comparator output |
o_ready | Output | 1 bit | Controller available |
o_valid | Output | 1 bit | Valid result |
o_dac_code | Output | 4 bits | Code applied to DAC |
o_result | Output | 4 bits | Conversion result |