Chargement…
Chargement…
The block implements a small inference dense layer with four input activations and two output neurons.
Equations
sum0 = bias0 + x0*w00 + x1*w01 + x2*w02 + x3*w03sum1 = bias1 + x0*w10 + x1*w11 + x2*w12 + x3*w13y0 = ReLU_sat8(sum0)y1 = ReLU_sat8(sum1)Inputs and weights are signed 8-bit values. Biases are signed 16-bit values. Each sum is calculated on 24 bits before activation.
The circuit is combinational. It contains eight multiplications, four per neuron. The two neurons use separate resources and their outputs follow the inputs after combinational delay.
ReLU_sat8 produces 0 for a negative or zero sum, keeps a sum from 1 through 127, and produces 127 above that range. Signed wraparound is not allowed.
This architecture favors throughput and uses more resources than a shared sequential neuron. In a high-frequency project, the adder trees and activation could be pipelined. Pipelining is outside this exercise.
| Signals | Direction | Width | Description |
|---|---|---|---|
i_x0 through i_x3 | Input | 8 bits each | Signed activations |
i_w00 through i_w03 | Input | 8 bits each | Signed neuron 0 weights |
i_w10 through i_w13 | Input | 8 bits each | Signed neuron 1 weights |
i_bias0, i_bias1 | Input | 16 bits each | Signed biases |
o_y0, o_y1 | Output | 8 bits each | Saturating ReLU outputs from 0 to 127 |