ADS7057 Fast 14-bit ADC Driver

The module drives the ADS7057 through the serial signals described in the datasheet, using timing suited to its 2.5-MSPS throughput, then places the 14-bit sample in a signed 16-bit output.

Behavior

• After reset, the FSM performs power-up calibration, an acquisition delay, and then normal-operation calibration.
• Once acquisition is complete, i_top_conv='1' starts a conversion.
• o_ads7057_cs_l frames the transaction and o_ads7057_sclk clocks i_ads7057_sdo.
• i_rvs provides the sampling reference used by the supplied solution to shift in received bits.
• o_data contains the sign-extended 14-bit sample in 16 bits; o_valid pulses when a complete frame has been received.
• i_rst_l='0' applies the active-low reset.

Refer to the official ADS7057 datasheet for calibration sequences, the 14-bit serial format, and CS/SCLK timing.