System debug and cross-trigger
Observe the processor and programmable logic in one debug experiment using ILA, VIO, breakpoints and cross-triggers.
Two domains to observe
The software debugger shows processor registers, memory, stack and C variables. The Integrated Logic Analyzer, or ILA, records internal PL signals while the circuit is running. A PS to PL interface defect often requires both views.
To illustrate cross-domain debugging, this course provides a precise scenario. A software counter writes its value to AXI GPIO and prints a message when it reaches 0x85. This value appears both in the C code and in the AXI transaction captured by ILA, so it becomes a common marker for both observations.
Preparing the design
Signals must be connected to an ILA or marked for debug before implementation. Capture depth consumes BRAM and probe width also has a cost. The ILA clock must correctly sample the signals being observed.
Virtual Input Output, or VIO, can read or drive small internal signals from Vivado. It is useful for resets, test modes and simple commands.
for (count = 0U; count < 256U; count++) {
XGpio_DiscreteWrite(&gpio, 1, count);
if (count == 0x85U) {
xil_printf("Special count reached\r\n");
}
}A conditional breakpoint stops the processor at 0x85. An independent ILA can capture AXI writes, but their timelines are not yet linked.
Cross-trigger
Cross-triggering forwards an event between debug resources. An ILA can stop a processor. A processor breakpoint can trigger an ILA. Multiple ILAs can trigger each other. This mechanism aligns software and hardware observations around the same event.
| Trigger | Result | Use |
|---|---|---|
| Processor breakpoint | ILA capture | See transactions before a C line |
| ILA condition | Processor halt | Inspect software when hardware detects a fault |
| ILA A | ILA B | Correlate two hardware domains |
Trigger and acknowledgement signals must be configured in the Block Design and debug tools. The handshake prevents an event from being lost while resources synchronize.
Building a useful condition
A good trigger answers one hypothesis. For AXI-Lite, detect a write to the data address with value 0x85. For DMA, detect an AXI error response. For an interrupt, capture assertion and acknowledgement.
The ILA retains samples before and after the trigger. A central trigger position shows cause and effect. Cross-trigger distribution still has latency, so it gives useful correlation rather than mathematical simultaneity.
Official references
Vivado Programming and Debugging UG908 documents ILA cross-triggering and probing a design.
Key points
The software debugger explains processor state. ILA explains PL signals. Cross-triggering connects their events. A useful capture starts from a precise hypothesis and trigger condition.
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