Custom AXI IP and driver

Create an AXI-Lite peripheral, define its register map, package it and integrate a driver into the BSP.

Start with a stable interface

A custom Intellectual Property block, or IP, is a reusable hardware module. It is easy to integrate when its contract is clear. The contract includes ports, parameters, register map, reset behavior and errors.

To apply the method, this course creates an IP called LED_Controller. It receives commands through AXI-Lite and drives an LED bus. After the engineer starts Create and Package IP, Vivado generates the AXI-Lite slave and register skeleton. We then add the functional logic in a separate module.

Reserved bits need a defined read value. Partial writes must honor WSTRB, the byte-enable signal that indicates which bytes are valid. Reset values must be documented.

for byte_index in 0 to C_S_AXI_DATA_WIDTH / 8 - 1 loop
  if S_AXI_WSTRB(byte_index) = '1' then
    slv_reg0(byte_index * 8 + 7 downto byte_index * 8) <=
      S_AXI_WDATA(byte_index * 8 + 7 downto byte_index * 8);
  end if;
end loop;

Separate protocol and function

The AXI wrapper is the interface layer around the useful logic. It handles read and write channels. The LED controller implements the expected behavior. This separation reduces the chance that a feature change breaks the protocol.

led_controller_i : entity work.LED_Controller
  generic map (LED_WIDTH => 8)
  port map (
    clk      => S_AXI_ACLK,
    resetn   => S_AXI_ARESETN,
    value_in => slv_reg0(7 downto 0),
    leds_out => LEDs
  );

The wizard uses a temporary project to validate and package the IP. The package then joins an IP repository referenced by the main project. After a change, update the version or refresh the catalog and regenerate output products.

Driver design

A standalone driver can have two layers. Level 0 provides offsets and register access. Level 1 provides an instance and high-level services.

#define XLED_DATA_OFFSET 0x00U
 
static inline void XLed_Write(UINTPTR base, u32 value)
{
    Xil_Out32(base + XLED_DATA_OFFSET, value);
}

typedef struct {
    UINTPTR base_address;
    u32 is_ready;
} XLed;

A self-test can write patterns, read registers and restore initial state. It cannot by itself prove that physical pins work. Production test needs loopback or external observation.

Official references

Driver structures and examples are available in the official embeddedsw repository. The Vivado guide catalog references UG1118 for custom IP creation and packaging.

Key points

An AXI IP is a hardware and software contract. Define the register map, reset and partial writes before the driver. Keep the AXI wrapper separate from user logic. The BSP supplies addresses and driver integration.

Test your knowledge - Chapter quiz